There’s a 5V circuit that powers a 3A transient load. The voltage source is a 5V/5A source that has a flat, 10mΩ output impedance, out to about 100kHz. The PCB is 4”x4” with a power plane completely overlapping the ground plane, the separation between the planes is 4mil, and the material has a Dk of 3.8. The transient load is a current pulse, a square wave with a period of 20us and a 10%-90% rise time of 10ns. The system can tolerate ringing up to 2% of the nominal voltage. Pick the bypass capacitance required for this circuit.
Where should I start with this? Keep reading to find out!
Circuit simulation tools can be used to model non-ideal power supplies and non-ideal capacitors to provide a relatively quick, inexpensive, and accurate method for picking bypass capacitance. This method will help the designer create circuits and PCBs for products with better signal and power integrity, increasing reliability and the chance of passing compliance testing the first time, while reducing the bill of materials cost.
Ladies and gentlemen, the story you are about to hear is (occasionally) true. The names have been changed to protect the innocent. Details have been changed to protect intellectual property. This content is for entertainment or informational purposes only. If you don’t like noise, I might suggest you leave the concert.
Once upon a time, there was a product that was failing FCC Class A. No one knew what to do, so they put it in a metal box and ran the test enough times to get a scan that was under the limit. The product is acquired by another company, passing the curse of emissions onto unsuspecting recipients. Our protagonist joins the story to find out what’s causing the issue. Upon a review of the product, he turns to the team and says, “I’ll give you a nickel for every bypass capacitor you can find on these boards.” He didn’t lose a dime.
Bulk Capacitors stabilize voltage sources and provide low-frequency load current for transient loads that exceed the power limit of the voltage source. These capacitors tend to be large in value (1F-100uF) and effective only at lower frequencies (say somewhere out to 10kHz or 100kHz).
Bypass Capacitors are generally smaller (10uF-1pF), the purpose of which is two-fold: First, bypass capacitors prevent voltage noise from entering the system by shorting high-frequency noise to the system ground. Second, when the system has a sudden load change, such as an impulse load or rectangular wave load, the bypass can source current for high-frequency harmonics that are outside the spectrum of the power supply. While definitions vary, bypass capacitors are generally intended for the 100kHz - 10GHz range. The type and value of each capacitor affect a different frequency range. In practice, multiple values are used in parallel to create low-impedance regions over a defined bandwidth.
A Decoupling Capacitor is used for isolating noise between two different circuits, and providing high-frequency current for a transient that would otherwise not be available due to the inductive nature of a transmission path. In practice, decoupling capacitors are bypass capacitors as they perform similar functions with semantic differences.
Plane Capacitance is the area in a PCB in which a power plane or polygon overlaps a ground plane or polygon creates a small capacitance. Because power planes/poly’s have relatively low ESR and can be attached to circuits with low inductance, these shapes can act as high-frequency bypass for frequencies above around 100MHz, depending on the configuration of the copper pours and the dielectric of the PCB material.
Bypass capacitors play a crucial role in electronic circuits, as they help to stabilize the voltage and reduce noise and interference that can cause malfunctions, create unintended emissions, or affect the performance and reliability of the device. When electronic devices operate, they draw current from a power source, creating high-frequency noise that can interfere with other components in the circuit. This is particularly important in analog circuits, where even small amounts of noise can cause errors in the signal, and in power supplies, where voltage fluctuations can cause malfunctions, damage to sensitive components, or create unintended emissions that cause a device to fail a compliance test.
Bypass capacitors work by providing a low-impedance path for high-frequency noise to travel to ground, bypassing other components in the circuit. By doing so, they help to maintain a stable voltage and prevent noise and interference from affecting other components in the circuit. Therefore, they are typically placed as close as possible to the device that requires a stable voltage, such as a microprocessor or memory chip, to provide the most effective noise reduction.
Some manufacturers provide values for the RLC elements for specific product lines. While this provides a reasonably accurate approximation for real capacitors, in some cases, it’s not accurate enough. In this case, a manufacturer may provide empirically measured S-parameters for a line of capacitors.
There are several non-ideal capacitor models that vary in accuracy, one of which is shown below. The middle portion of this model shows an RLC model of a non-ideal capacitor, and indicates there are also parasitic elements involved in the transmission path between the circuit and the capacitor, such as an inductive lead of an axial/radial wire or the parasitic inductance/capacitance of a trace or via.
As taught in Circuits 101, an ideal capacitor has a reactance of -j/ωC, and an ideal inductor has an impedance of jωL, where ω is the angular frequency equal to 2πf. The vector sum of the resistance and reactance of the non-ideal capacitor forms the capacitor's impedance.
Okay, great, what does that mean?
Consider the following circuit and simulation:
The circuit has an AC source connected to a non-ideal capacitor model for an automotive-grade ceramic 0603 SMT 10nF capacitor.
The simulation is an AC analysis from 1kHz to 100GHz.
The plot shows the impedance of the non-ideal capacitor model vs. frequency.
What’s happening with the impedance:
For lower frequencies, the impedance follows the 1/ωC curve.
Around 11MHz, the inductance begins to show influence, and the curve steepens following the LC tank impedance.
Around 80MHz, the ESR dominates, preventing the LC impedance from approaching 0Ω.
From here, the impedance of the inductor begins to dominate, causing the impedance to rise again.
Finally, around 400MHz, the impedance of the inductor dominates, and follows the ωL curve until other parasitics take over.
Conceptually, this means the non-ideal capacitor is a high impedance for low-frequency signals. The impedance decreases with frequency to a point, then begins rising. This applies to continuous wave signals or signals with harmonic content, such as impulses, rectangular waves, etc.
For bypass capacitors, the affected bandwidth generally means “a frequency range where the capacitor exhibits low impedance.” Well, that’s a mouthful. Let’s say we want to define the effect a capacitor has as a bandwidth with an impedance of less than 1Ω. By that definition, the capacitor is effective between around 15MHz to 400MHz. For signals with frequencies below or above that bandwidth, the capacitor impedance will be greater than 1Ω, and for signals with frequencies inside that bandwidth, it will be less than 1Ω.
Putting multiple capacitors in parallel can broaden the effective bandwidth of the bypass. We can use this technique to create a low-impedance voltage plane! It’s up to the designer to define the bandwidth bypass. Generally, the power supply and bulk capacitance will be effective at about 10kHz or 100kHz, so bypass should be analyzed past this point.
The circuit below consists of models for seven values of capacitors ranging from 10pF to 10uF connected in parallel. The plane capacitance is estimated based on the size of the overlapping voltage and ground planes, the distance between them, and the dielectric of the PCB material. The analysis is done from 10kHz to 10GHz.
Note: This simulation does not show the effect of impedance from the power supply or any bulk capacitance. The intent is to estimate the plane impedance from 10kHz-10GHz, knowing that the impedance below 10kHz will be done when designing the power supply and picking bulk capacitance.
The plot shows the impedance of each capacitor, the plane, and the effective plane impedance. It also gives some insight that we otherwise wouldn’t have. For instance:
The 10pF and 100pF capacitors don’t necessarily affect the impedance of the plane as the plane capacitance dominates above around 150Mhz. So these capacitors might be able to be removed without any issue.
There’s a peak around 120MHz that could be brought down with another 1nF capacitor.
The lumped element model doesn’t necessarily represent the real capacitor. It’s an approximation. For a closer model, the measured S-parameters should be used.
This technique ignores parasitics from connecting traces, vias, etc. The inductance of long traces and vias may dominate, creating high impedance in spectrums the designer thought were low impedance.
This technique is an approximation that gives some insight into the frequency response of the bypass. It’s far more accurate than simply guessing what values and quantity to use, but not quite as accurate as firing up a full-wave solver to analyze the PCB structure, all the vias, and each capacitor. Likewise, it’s not as fast as the guessing technique, but much faster and more cost-effect than the solver.
In the story above, the product was either designed by or cost reduced by someone who had no idea why bypass is important. In this case, guessing would have been better than nothing. This technique helps minimize the number of capacitors used and helps prevent placing capacitors that may have a minimal effect!
There’s a 5V circuit that powers a 3A transient load. The voltage source is a 5V/5A source that has a flat, 10mΩ output impedance, out to about 100kHz. The PCB is 4”x4” with a power plane completely overlapping the ground plane, the separation between the planes is 4mil, and the material has a Dk of 3.8. The transient load is a current pulse, a square wave with a period of 20us and a 10%-90% rise time of 10ns. The system can tolerate ringing up to 2% of the nominal voltage. Pick the bypass capacitance required for this circuit.
What?
Okay, let’s step through this.
The source:
5V/5A source with a 10mΩ output impedance and a bandwidth of DC-100kHz.
Look at the source impedance as a piecewise function:
For current demand less than 5A, the output impedance is 10mΩ. For current demand greater than 5A, the output impedance is infinite.
Assume 100kHz is the -3dB impedance point. Impedance will look resistive to 100kHz and inductive past 100kHz. This mimics the behavior of a power supply attempting to regulate outside the bandwidth of its GH loop.
The source can be modeled in Spice as follows:
Use an ideal 5V voltage source.
Use an ideal diode in series with a very small forward and reverse voltage drop to set the output resistance and current limit (RON=10mΩ, ROFF=10mΩ, ILIM=5A).
Use an inductor in series to model the output resistance past 100kHz. The output resistance and inductor form an RL low-pass filter with the -3dB point at 100kHz, giving an output inductance of approximately 15.9nH.
The load (please refer to Estimating Signal Bandwidth from Rise Time):
The load can be modeled as a current pulse with a period of 20us, an on time of 10us, and rise/fall times of 12.5ns.
The load is a special case of a rectangular wave known as a square wave:
The first harmonic has a magnitude of 3.82A and a frequency of 50kHz (1/20us). At 50kHz, the impedance can be at most 26mΩ (100mV/3.82A).
Since the load is a rectangular wave with a 50% duty cycle, the magnitude of the second harmonic is 0A at 100kHz.
The magnitude of the third harmonic is 1.27A at 150kHz. At 150kHz, the impedance can be at most 79mΩ (100mV/1.27A).
The fourth harmonic has a magnitude of 0A at 200kHz.
The magnitude follows this trend and continues decreasing to about 4.2mA around 45MHz.
The PCB:
The prompt gives information about the planes and the material. The plane capacitance can be calculated using the parallel plate capacitor formula (C=εA/d).
Picking Bypass:
We’re only interested in picking capacitance past 100kHz. The power supply sets the low-frequency impedance, which is 10mΩ out to about 100kHz.
Generally, getting a plane impedance less than 1Ω should be easy, so the maximum impedance at any frequency should be 1Ω.
Pick bypass such that the plane impedance is <79mΩ for the third harmonic (around 150kHz), gradually increasing to 1Ω at 45MHz.
Some of these statements are hand-wavy, but this technique is supposed to be quick! Let’s see what it gets us!
Yeah, so… <*ring* *ring*> “Hello, this is the FCC. Straight to emissions jail.” (Obviously satire, the FCC would write!)
Let’s look at our plane impedance and dial it in to meet the criteria above:
Well, what do you know! Picking capacitance values based on the magnitude of the harmonic content of the load to create an appropriate plane impedance across frequencies can be relatively simple! But the part I find most satisfying is only 5 capacitors were needed to meet the design criteria!
How many capacitors would you have picked if you were simply to “guess” how many were required? How long would it have taken to fire up a full-wave 3D field solver to simulate this result, and how much would it have cost?
In practice, I would pick a few more capacitors to accommodate the limits of this method. Recall: The simulation doesn’t take into account via or trace inductance, so understanding how to create low-inductance geometries in your PCB layout is essential. Real-world signals don’t necessarily follow strict duty cycles or rise times, so the spectrum may be shaped differently. The lumped element capacitor model provided by the manufacturer may only be reasonably accurate. All of these add up to small sources of error that are addressed with a safety factor.
Overall this method provides a relatively quick and reasonably accurate method for picking bypass capacitance!
Download the LTSpice schematic file and plot settings file used to generate the plane impedance example to run your simulations!